A communication semiconductor integrated circuit that has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency is known. The oscillator circuit for the transmission PLL circuit is configured to be operable in a plurality of bands.
The communication semiconductor integrated circuit also includes a circuit for measuring the oscillating frequency of the oscillator circuit for the transmission PLL circuit, and a storage circuit for storing the result of measurement made by the measuring circuit.
A judging part that stores the data of a frequency measuring part, polarity judging part, and pulse width measuring part of a horizontal synchronizing signal, and the data of a frequency measuring part, polarity judging part, and pulse width measuring part of a vertical synchronizing signal in the ROM table of a microcomputer is known. The data are compared with the measured data, and the kind of the equipment in which the entire data are equal is judged as that of the signal source connected at present.
Then, the frequency division is operated by the frequency-division ratio corresponding to the signal source. And also, a PLL circuit is constituted of a phase comparator, a loop filter, and a voltage control type oscillator, and the clock signal corresponding to the signal source is reproduced. Thus, the switching of the frequency-division ratio is automatically operated, and the regeneration of the clock signal is simplified and quickened.    [Patent Document 1] Japanese Laid-open Patent Publication No. 2004-112750    [Patent Document 2] Japanese Laid-open Patent Publication No. 05-14760